Job Description

Position Summary
Samsung is a world leader in Memory, LCD and System LSI technologies. We are currently looking for exceptional software and hardware talent to join our Samsung Austin R & D Center (SARC) in Austin, TX and our Advanced Computing Lab (ACL) in San Jose, CA. SARC was established in Austin, TX in 2010 to be one of Samsung’s strategic investments in high performance low power ARM based device technology. Our CPU design teams develop IP for Samsung mobile products and their Application Processor (AP). Our GPU design teams, located in Austin (SARC) and San Jose (ACL), are developing a custom GPU that will be deployed in Samsung mobile products
Samsung Austin R&D Center (SARC) is hiring a CAD Signoff Engineer in Design Methodology. SARC was founded in 2010 to develop the best CPU and System IP for Samsung mobile products (Samsung Galaxy S-series, Samsung Note-series).
The Samsung Austin R&D Center (SARC) develops mobile microprocessors to meet aggressive performance and low power goals for premium smart phone and tablet devices. The SARC CAD team develops tools and methodologies targeting the complete range of design flows from full custom to highly automated synthesis/place & route.
The signoff CAD/methodology engineer will develop methodology and tools to ensure the high performance designs meet tight requirements for timing, power, drc, lvs, EMIR, formal, etc. The responsibilities will include first level support for tools and flows for all of signoff, and developing automated solutions for signoff of various designs.
Our culture is professional and fun; laid back and hard working. One of our core values is to learn and improve and the value is sincere. We believe there is always room for personal development and we have a proven track record of providing opportunities for advancement into other positions. Our budget includes a line item for technical training and certifications every year.
Role and Responsibilities
+ Support CAD flows related to signoff (timing/power/em/ir/drc/lvs/formal/extraction)
+ Provide flow support to design team involving triage and planning for future signoff capability
+ Work with design team to adapt signoff flows to meet specific project needs for advanced nodes
+ QA signoff flows and logs, and ensure that designs are ready for tapeout
+ Test and regress CAD signoff flows
Background/Experience
+ MSEE and 3+ years of relevant experience
+ Experience with all or at least most of the following is required:
+ 3+ years of experience with signoff of a high performance chip design on advanced nodes
+ Experience with the Synopsys Primetime STA tool, especially with tool setup/configuration, and automation with tcl
+ Knowledge and understanding of key STA concepts, library characterization, and extraction
+ Customer oriented with experience supporting highly skilled design teams working under tight schedules
+ Must be experienced/proficient with scripting/programming – especially in Perl/Python/Tcl
+ Evaluating cutting edge technology nodes, and predicting and solving new challenges emerging from new technologies
Skills and Qualifications
Required:
+ Ability to solve problems on CAD and design methodology issues.
+ Excellent communication and interpersonal skills.
+ Ability to clearly and precisely communicate with colleagues on requirements and specs.
+ Ability to document and publish results and user documents.
+ Ability to work effectively in a production environment and deliver working solutions.
+ Working knowledge of flows to do timing/power/em/ir/drc/lvs/formal/extraction
+ Flexible and adaptable to challenging schedule.
Experience in the following areas will be a plus:
+ STA/Primetime
+ Extraction
+ Advanced place and route tools
+ Experience working in multi-cultural environments.
Skills and Qualifications
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Samsung Electronics is a global leader in technology, opening new possibilities for people everywhere. Through relentless innovation and discovery, we are transforming the worlds of TVs, smartphones, wearable devices, tablets, digital appliances, and network systems, and the entire semiconductor industry
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