Job Description


What you do at AMD changes everything  


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

RESPONSIBILITIES:

  • Participate in SOC full Chip DFT feature and architecture definition
  • Responsible for DFT specification generation and review
  • Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.
  • Perform verification on all DFT structures
  • Generate DFT related timing constraints and work with PD team for timing closure
  • Generate and verify DFT structural patterns and functional patterns
  • Participate in ATE bring-up and debug the DFT patterns on ATE
  • Design and implement other DFX (debug, characterization, yield etc) logics

REQUIREMENTS:

  • -   BS in EE & CS.  MS preferred, with 4+ years experience.

    -   Hands on working experience on ASIC DFT design and verification
    -   Familiar with entire ASIC design flow

    -   Experience with micro processor design a big plus

    -   Should have strong problem solving skills
    -   Good English hearing, speaking, reading and writing capabilities

    -   Good communication skills


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