Micron Technology’s vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community.
Micron’s Signal Integrity Research and Development (SI R&D) group supports all current and future product development, including DRAM, LPDRAM, NAND, NOR, 3DXP, DIMM modules and SSDs within the consumer, server, mobile, networking, graphics, automobile and embedded businesses. The SI R&D group works on analysis of end to end systems solutions including, but not limited to circuit level IO and Power Distribution, integrated circuit (IC) packages, printed circuit boards (PCBs) and measurements to ensure good Signal Integrity (SI) and power integrity (PI) performance for Micron’s memory solutions. The group owns all steps of the signal and power integrity support process including die IO and package model generation, product performance analysis, system-level SI evaluation, measurement, correlation, and customer support. The group also supports future specification development within several industry standards groups including but not limited to JEDEC, ONFI, and IBIS. The group working environment is technically challenging, team-oriented, collaborative and customer-centric.
Within the larger SI R&D group, as an Engineer in the Signal Integrity team at Micron, you will be responsible for
Leading technical working on various aspects of SI and PI for high speed interfaces, including modeling (silicon, package and board level signal and power delivery network, as necessary for the project), time and frequency domain analysis for SI and PI electrical performance evaluation of Micron products and correlation to measurement for the various products.
Ensuring that processes for various methodologies are executed effectively and accurately.
Collaborating with TMs within the global SIRD group for development and continued optimization of methodologies for modeling and analysis as needed.
Representing the SI R&D team in technical cross functional collaborative groups, and integrating with package design, silicon design, product engineering, and marketing departments to ensure overall product performance.
Occasionally Supporting FAE, applications engineers with models for service to external customer as needed
Occasionally Supporting path-finding activities through modeling support
Successful candidates for this position will have:
Bachelors or Masters in Electrical/Electronics Engineering wtih 3-12 years of industry experience
Desirable Previous experience being people leader
Required courses covering electromagnetic, transmission line and RF theory, analog design or similar fields of study or experience.
Strong SI/PI/EMI theory and application, modeling, analysis, simulation
Signal and Power Integrity Background
Experience with, and intermediate working knowledge of E.M. field solvers (quasi-static and full wave), time and frequency domain simulation tools like Q3D, SIWAVE, HFSS, HSPICE, ADS, etc..
Deep understanding of electromagnetic and transmission line theory, general I/O design, signal integrity, differential and single-ended interface technologies.
Deep understanding of timing budgets and jitter analysis
Expertise in Printed Circuit Board (PCB) layout or electrical package design techniques.
Experience in design and analysis of high-speed single-ended or differential buses
Familiarity with, and fundamental understanding of lab measurement equipment like Oscilloscopes, TDR, Vector Network Analyzer (VNA), etc.
Familiarity with statistical analysis (DOE) and equivalent tools (example: JMP) is also beneficial
Desirable Memory industry experience
Ambitious candidate should enjoy leading and taking ownership of assigned projects, exhibit good written and verbal interpersonal skills, and have the ability to work well in a team with varied strengths.
Successful candidates for this position will be:
Pro-active – Candidate will be expected to identify gaps and opportunities and address them with minimal supervision.
Collaborator – Candidate will be expected to work with various teams globally; and support both internal as well as external customers
Communicator – Candidate should be able to clearly convey necessary details of complex issues and corresponding solutions in both written and verbal formats.
We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran’s status, or other classifications protected under law. This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices.
Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters.