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Senior Test Engineer

THE ROLE:

  • Test Engineering is a cost, quality, and time-to-market driven team responsible for enabling the availability of AMD ACAP products to our customers. Pre-silicon responsibilities for the Test Engineer include understanding product features, development of test plans and requirements and developing test patterns. Test Engineer will work closely with IC design. Post-silicon responsibilities include on time delivery of tests coverage and test patterns. This may include debugging of silicon test performance issues, yield issues, manufacturing processes, and device marginalities. The Test Engineer will work closely with Product Engineering to root cause issues that result from the debug and margin analysis. The Test Engineer also require balancing the test time with quality to meet product requirements.

THE PERSON:

  • The Test Engineer team is looking for a talented, self-driven and motivated engineer to join our team of experienced and accomplished engineers. Position involves test program development, data analysis, and silicon debug, preferably with experience in RTL and Gigabit transceiver knowledge.

KEY RESPONSIBILITIES:

  • Working closely with IC Design during pre-silicon verification (chip level verification) and post silicon validation
  • Developing high coverage functional BIST patterns, built in FPGA fabric, to test the embedded SERDES
  • Fault Grade and analyse functional BIST patterns to ensure highest quality.
  • Working with Product Engineer to address Yield, Design & Quality issues during New Product Introduction phase and also to address any post production issues
  • Building or contributing to a scalable pattern development methodology to efficiently test highly configurable embedded SERDES
  • Balancing Test Time with quality to meet product requirements
  • Defining DFT requirements for next generation SERDES to improve test coverage or time

PREFERRED EXPERIENCE:

  • 5 years or more industry experience
  • Good communication skills including data analysis and presentation
  • Solid understanding of digital/mixed-signal design, static timing analysis and timing closure techniques
  • Fluency in writing synthesizable RTL; Verilog and SystemVerilog
  • Experience with post-silicon debug and bench equipment (e.g., oscilloscope and logic analyser)
  • Experience with High Speed Giga Bit Transceivers (GT) is highly desirable.
  • Knowledge of advanced processor and embedded C programming
  • Good understanding of how HW and SW work together in SoC/embedded system
  • Experience with FPGA design flow and timing closure is strongly desirable
  • Experience in using simulation/emulation environments for pre-silicon validation is desired

ACADEMIC CREDENTIALS:

  • BS/MS EE or equivalent

LOCATION:

Singapore


AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV

#LI-SP2


Requisition Number: 175169 
Country/Region/Location: Singapore State/Province: Singapore City: Singapore 
Job Function: Reliability & Test  


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