Verification Methodology Engineer (UVM)

NXP India Pvt. Ltd. - Noida (Noida, UP, India) 14 days ago

NXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has over 29,000 employees in more than 30 countries and posted revenue of $8.88 billion in 2019.

Specific skills & knowledge:
• Bachelor or Masters in Electronics Engineering or Computer Engineering and knowledge of EDA tool based RTL design/verification techniques.
• 8-10 years experience in the random verification using System Verilog and C.
• Hands on experience of writing System Verilog testbenches and random stimulus.
• Good hands on knowledge of C/C++ will be a big positive and knowledge of Tcl/Python or any other scripting language is expected.
• Candidate should have strong debugging and problem solving skills.
•  Excellent communication and documentation skills, customer support experience is a desired attribute. 
• Knowledge of regression tools and their setup, related automation would be a bonus.

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Verification Methodology Engineer (UVM)

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