Technical Program Manager, SoC Development TeraWave

Principal Technical Program Manager

Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.

Blue Origin is seeking a Principal Technical Program Manager to lead the development and execution of advanced system-on-chip SoC programs for TeraWave digital beamforming applications. These highly integrated devices include complex analog/mixed-signal, RF-adjacent, and digital designs, as well as third-party IP blocks, and will support high-performance satellite communications and beamforming systems.

This role will own program execution from early requirements definition through architecture, design execution, tapeout, silicon bring-up, qualification, OSAT engagement, and production transition. The ideal candidate combines formal technical program management discipline with enough IC design and/or satellite communications system knowledge to effectively drive cross-functional technical teams, manage dependencies, identify risks, and align internal and external partners to deliver hardware on schedule.

Key Responsibilities

• Lead end-to-end technical program execution for TeraWave SoC/IC developments targeting digital beamforming and satcom applications.
• Drive planning and coordination across all development phases, including:
• Market/product requirements definition
• MRD / SRD / system requirements alignment
• Architecture and implementation planning
• IP selection and integration planning
• Analog/mixed-signal and digital design execution
• Verification, validation, and DFT readiness
• Tapeout planning and signoff readiness
• Silicon bring-up
• Characterization and qualification
• OSAT selection, packaging, test, and production ramp
• Establish and maintain integrated program schedules, milestones, deliverables, dependencies, risk registers, and execution dashboards.
• Coordinate cross-functional teams including IC architecture, analog/mixed-signal design, digital design, verification, physical design, systems engineering, hardware, software/firmware, supply chain, quality, manufacturing, and operations.
• Align third-party IP deliverables with the overall SoC program, including licensing milestones, integration schedules, verification collateral, documentation, support models, and risk mitigation plans.
• Identify, evaluate, and coordinate with OSAT partners for packaging, assembly, test, qualification, yield improvement, and production readiness.
• Partner with engineering leads to ensure technical readiness at major program gates, including architecture reviews, design reviews, tapeout readiness reviews, bring-up readiness reviews, qualification reviews, and production readiness reviews.
• Manage critical path execution and proactively resolve schedule, resource, technical, supplier, and operational risks.
• Translate technical complexity into clear executive-level reporting, including status, risks, decisions needed, and mitigation plans.
• Ensure alignment between IC deliverables and higher-level TeraWave system objectives, including performance, power, cost, manufacturability, quality, reliability, and schedule.
• Drive disciplined change management for requirements, scope, design assumptions, supplier commitments, and production plans.
• Support build-versus-buy, supplier strategy, IP strategy, packaging strategy, and test strategy decisions.
• Foster a culture of accountability, ownership, technical excellence, and rapid but disciplined execution.

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Systems Engineering, Physics, or a related technical discipline.
• 7+ years of formal experience in technical program management, engineering program management, or equivalent technical leadership roles.
• Demonstrated experience managing complex hardware, semiconductor, aerospace, satcom, RF, digital communications, or high-reliability technology programs.
• Working technical knowledge of at least one of the following:
• IC / SoC development lifecycle
• Analog/mixed-signal IC design
• Digital ASIC/SoC design
• RF or beamforming systems
• Satellite communications systems
• Advanced packaging, silicon qualification, or production test
• Experience managing programs across multiple lifecycle phases, from requirements and architecture through development, validation, qualification, and production.
• Experience building and maintaining integrated schedules, risk registers, dependency maps, milestone plans, and executive-level program reporting.
• Ability to work effectively with highly technical engineering teams and translate between detailed technical execution and program/business objectives.
• Strong communication, decision-making, stakeholder management, and cross-functional leadership skills.
• Ability to manage external partners, vendors, suppliers, or IP providers.
• Must be a U.S. person as defined by applicable export control regulations, if required for the role.

Preferred Qualifications

• Master's degree or higher in Electrical Engineering, Computer Engineering, Systems Engineering, or a related field.
• 10+ years of technical program management experience for Principal-level consideration.
• Direct experience leading semiconductor programs through tapeout, silicon bring-up, qualification, and production ramp.
• Experience with complex SoCs containing analog/mixed-signal blocks, high-speed data converters, PLLs, SerDes, DSP engines, embedded processors, memory interfaces, or custom digital accelerators.
• Experience with digital beamforming, phased arrays, SATCOM payloads, RF front ends, modems, or space-based communication systems.
• Familiarity with semiconductor development flows, including design specification, RTL, verification, DFT, synthesis, place and route, timing closure, signoff, mask generation, tapeout, packaging, test, and yield learning.
• Experience coordinating third-party IP integration, including commercial IP, hard macros, PHYs, processors, memory IP, security IP, or EDA/vendor deliverables.
• Experience selecting and managing OSATs, packaging vendors, ATE partners, and semiconductor supply-chain partners.
• Familiarity with package technologies such as flip-chip, BGA, wafer-level packaging, MCM, 2.5D/3D integration, or advanced thermal/mechanical packaging approaches.
• Knowledge of qualification and reliability standards relevant to aerospace, defense, space, or high-reliability semiconductor products.
• PMP, PgMP, Agile, Lean, Six Sigma, or equivalent formal program management training/certification.
• Experience in fast-paced startup-like environments or new product introduction programs within larger organizations.