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Senior Yield Engineer: Defect Reduction & Optimization

Tower Semiconductor, a leading foundry in high-value analog semiconductor solutions, seeks a Sr Yield/Process Engineer to monitor inline defectivity, analyze defect trends, and collaborate with cross-functional teams to improve yields and manufacturing efficiency.

The role requires 3–5 years of yield/process engineering experience, a relevant engineering degree, and proficiency with defect inspection tools and SPC methods. Strong collaboration across global teams is essential.

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Senior Yield Engineer: Defect Reduction & Optimization

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