Field Programmable Gate Array Jobs In Palm City, California - 1 Job Positions Available

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Senior TPU Design Engineer, Silicon

Google ( San Diego CA )

Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. 4 years of experience in leading IP/SoC