This is a Senior/Staff-level ASIC/RTL Design Engineer role requiring 10+ years of industry experience in end-to-end SoC design. The strongest candidates should have hands-on expertise in RTL coding, micro-architecture, ASIC design flow, verification/debug, synthesis, timing closure, and silicon bring-up,
Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In Create Account) 2. If you already have a Candidate Account, please
Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In Create Account) 2. If you already have a Candidate Account, please
AWS Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s services
Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology Together Our technology solutions
Lead SDE C/C++ Hardware/Software Co-Design, Machine Learning Acceleration Systems Annapurna Labs stands at the forefront of hardware/software co-design, leading innovation not just within Amazon Web Services (AWS) but across the entire industry. We design and build
AWS Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s services
Description AWS Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s
Senior Asic Design Engineering Manager Cornelis Networks is looking for a Senior ASIC Design Engineering Manager to lead and grow our RTL design engineering team. Reporting to the VP of ASIC Engineering, with direct exposure to executive
Job Description Renesas is a global semiconductor company providing hardware and software solutions for various cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the worlds