Position:Design Verification Engineer (Einfochips) Job Description: Experience: 6+ Years Location: Austin TX and San Jose CA Job Description: What candidate will Be Doing: At-least 6+ years of experience in System Verilog HVL and C++/C At-least 6+
Company Description The Sr Hardware Validation engineer serves as embedded hardware domain expert, driving product and platform design quality, evaluation and validation objectives, and technical execution while collaborating closely with systems, firmware/software, validation, and platform develop