Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional MTS Digital Design Engineering to join our Memory Interface Chip team in San Jose. In this role, you
Job Description: Design cost effective controller with high performance, low power and small area for cellular modem. This position will work with multi-nation teams in leading-edge process node and be involved in: - Perform CPU development and
Meta is seeking highly skilled Design Engineers to join our team. In this role, you will contribute to the development of advanced technology solutions, including machine learning and network acceleration. You will collaborate with researchers and engineers to design, implement,
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, or a related technical field. 10 years of experience in design for Digital Signal Processing (DSP) or high-speed digital logic. Experience in Verilog/SystemVerilog or VHDL. Experience with MATLAB, Python, or
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, or a related technical field. 8 years of experience in digital signal processing (DSP) design or high-speed digital logic design. Experience implementing digital blocks for communication systems or PHY (Physical Layer) e.g.,
PsiQuantums Electronic Sub-Systems team seeks a senior digital design engineer to define, implement, and validate digital microarchitecture for FPGAs. You will work on Verilog/SystemVerilog RTL design, synthesis, and lab validation to meet tight performance specs. Responsibilities include debugging, simulation-based verification, collaboration
Job Summary The digital design engineer will join PsiQuantums Electronic Sub-Systems team in the development of innovative digital microarchitecture definition, documentation, implementation, and validation for FPGAs.Responsibilities Logic design, debugging, and verification using Verilog/SystemVerilog for FPGAs. FPGA synthesis, constraints, and implementation. Perform
Cupertino, California, United States - HardwareDescription As a Sensor Digital Designer you will own the specification and verification of sensor digital signal processing and many aspects of sensor interfaces. Collaborating with global sensor suppliers to develop and evaluate
Apple Inc. in Cupertino, California, is seeking a Sensor Digital Designer to own the specification and verification of sensor digital signal processing and sensor interfaces. You will collaborate with global sensor suppliers and sensor designers to analyze digital micro-architecture,
About Unconventional Since 2022, AI has entered the mainstream, reshaping entire industries from education and software development to fundamental consumer behaviors. This revolution has created an unprecedented demand for computation—a demand that is now fundamentally limited
Staff Engineer, Design Engineering Req ID: 137022 Region: Americas Country: USA State/Province: California City: San Jose Summary The Signal Integrity Engineer will play a critical role in the planning of digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues
Company Description Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful
SummaryImagine the world without Apple devices! Does it feel strange? Apple products might even be one of the reasons you wanted to BE a Hardware Design Engineer. Now, imagine yourself designing future Apple products. The iPhone team is
We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradynes test technology ensures your device works right the first time, every time! Our portfolio of
About Lyte Lyte builds perception systems for Physical AI operating in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next-generation automation. Lyte is headquartered in
Job Description Work Arrangement: This role is cate gorized as hybrid. This means the successful candidate is expected to report to Austin, TX, Warren, MI, Sunnyvale, CA, or Mountainview, CA, three times per week, at minimum.
Job Description Work Arrangement: This role is categorized as hybrid. This means the successful candidate is expected to report to Austin, TX, Warren, MI, Sunnyvale, CA, or Mountainview, CA, three times per week, at minimum. About
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related technical field, or equivalent practical experience. 2 years of experience in ASIC RTL design using systemverilog or verilog. Experience with industry-standard EDA tools for
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience in high-performance ASIC design. Experience architecting or designing RTL solutions for digital systems. Experience with
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. Experience