Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience in high-performance ASIC design. Experience architecting or designing RTL solutions for digital systems. Experience
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. Experience with
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Experience with scripting languages. Preferred qualifications: Masters degree or PhD in Electrical Engineering, Computer Engineering or Computer
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for CPU RTL development targeted for high performance, low power devices. Works with chip architects to conceive
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: We are hiring talented engineers for RISCV CPU RTL development targeting high-performance, low-power devices. In this role, you will contribute to architecture and product definition
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. In this role, you will work with chip architects
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 4 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. Design experience
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: We are seeking a highly skilled and versatile engineer who thrives at the intersection of RTL design and CAD automation. This role is ideal for
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience in ASIC design. Experience with SystemVerilog/RTL coding. Experience with scripting languages (e.g., Tcl, Python
About Quadric Quadric is redefining edge AI with the industrys first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture. Our technology
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, or a related technical field. 8 years of experience in digital signal processing (DSP) design or high-speed digital logic design. Experience implementing digital blocks for communication systems
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience in ASIC design, including one project focused on PCIe logic. Experience debugging RTL using
Minimum qualifications: Bachelors degree in Electrical Engineering or a related field, or equivalent practical experience. 8 years of experience with SystemVerilog, hardware design, automation, design verification test. 5 years of experience working with Computer-aided design (CAD).
Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the digital architecture, design, Verilog RTL coding, implementation, and verification of next generation wireless and wired
Advanced Energy is seeking an FPGA Engineer to design and modify RTL logic for FPGA-based hardware used in mission-critical applications. You will perform basic and applied research, development, and design of new products while collaborating with hardware
A tech company in Cupertino is seeking an experienced ASIC/VLSI Design Engineer to design innovative communication systems. The role involves collaboration with multiple teams, RTL coding, and optimization of design for performance. Candidates should have over 5
Trilyon, Inc. is seeking an ASIC Engineering Technical Lead to manage and implement robust RTL development with a focus on CDC/RDC methodology. The ideal candidate will have at least 10 years of experience in the field, contributing
Annapurna Labs, a unit of Amazon, is seeking a Senior CAD Manager to lead the RTL-to-GDS methodology and infrastructure for multi-site tapeouts. You will own the digital backend toolchain, drive the roadmap, and partner with design, DV,