Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, or a related technical field. 8 years of experience in design verification (DV) with a focus on digital signal processing (DSP), communication systems, or arithmetic logic blocks.
Metas infrastructure hardware team is seeking a Staff Signal Integrity Engineer to drive the design and validation of high-speed interconnects across Metas data center platforms. In this role, you will own the signal integrity methodology, design,
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group Software Applications Engineering General Summary: The Sr Staff ARM Server Firmware Management Customer Engineer is a senior technical authority responsible for driving the success of ARM based, hyperscale
JOB SUMMARY Semtech is a leading supplier of high-performance analog and mixed-signal semiconductors powering high-speed optical interconnects for hyperscale and AI data center networks, enterprise networking, wireless infrastructure, and passive optical access networks. The successful product
Annapurna Labs (our organization within AWS) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and
SpaceXAI’s mission is to create AI systems that can accurately understand the universe and aid humanity in its pursuit of knowledge. Our team is small, highly motivated, and focused on engineering excellence. This organization is for
Arycs Technologies is a fast‑moving startup at the forefront of optical communications, building next‑generation optical modules that power AI, data centers, and cloud infrastructure. Our team is small but mighty—combining deep technical expertise with a bias
Cspeed IO is a stealth start up backed by Sutter Hills Ventures and Atreides Capital – headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and
Cspeed IO is a stealth start up backed by Sutter Hills Ventures and Atreides Capital – headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category‑defining semiconductor and
Role Description Mercor is partnering with a leading AI research group to engage audio professionals in a high‑impact project focused on advancing AI systems with sophisticated auditory and voice interaction capabilities. As an AI Tutor –
What is a Employee Secondment Agreement? The Employee Secondment Agreement is essential when temporarily assigning employees between organizations while maintaining their original employment relationship. This document is particularly crucial in the United States, where it must
What is a Employee Secondment Agreement? The Employee Secondment Agreement is essential when temporarily assigning employees between organizations while maintaining their original employment relationship. This document is particularly crucial in the United States, where it must
Cspeed IO is a stealth start up backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and
About Arycs Technologies At Arycs Technology, we believe AI infrastructure must scale within realistic power and integration limits. Our systems are engineered for deployment in real networks — not theoretical environments. We prioritize architectural efficiency over
Director of System Validation Engineering Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs
Immediate need for a talented PCIe Silicon Validation & Debug Engineer. This is a 06+ months contract opportunity with long-term potential and is located in Sunnyvale CA (Remote; for all over US). Please review the job
Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering
Role: PCIe Silicon Validation & Debug Engineer Location: Sunnyvale CA (Onsite) Duration: 9+ Months Contract Job Description: Summary We are seeking a skilled PCIe Engineer to join our Silicon Engineering team. The ideal candidate will have