Overview Pay Range: $60.00/hr - $100.00/hr (Based on skill and experience) Openings: 1 Location: Remote candidates near Denso facilities within driving distance to Southfield, Michigan or Plano, Texas (travel to a Denso location every 4‑6 weeks;
Job Title: Memory I/O Design Engineer Location: Boxborough, MA (100% Onsite) Contract: 1 Year Client: AMDBase Pay Range $45.00/hr - $50.00/hrJob Description We are seeking a Memory I/O Design Engineer to join the High-Speed I/O design
L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers mission and quest for professional growth. L3Harris provides an
Job Title: Sr Electrical Engineer - FPGA & ASIC Design Solutions Rate: $113/hr on W2 Duration: 12 months Clearance: Active Secret required (Top Secret acceptable if willing to work at Secret level) Duration: 1 year (extension
4 days ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features.Base pay range $180,000.00/yr - $220,000.00/yrProfessional Technical Recruiter | Connecting You to Your Dream Job Full-Time The engineer’s
We anticipate the application window for this opening will close on - 16 Sep 2026 Position Description: Direct a team including Mechanical, Hardware, Electrical, Electronics engineers, and their activities to attain business goals consistent with cost,
Company Description Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an
What MatX Is Building MatX is on a mission to be the compute platform for Artificial General Intelligence. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and
Basic Qualifications Bachelors degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 2 years of relevant experience; or Masters degree, plus 6 months of relevant experience. CLEARANCE REQUIREMENTS:Ability
Software Reverse Engineer The Opportunity: Work as part of a varied contract team supporting a DoW client. Apply the expertise required to perform in-depth technical evaluations of computer and network technologies through the analysis and identification
Software Reverse Engineer, Senior The Opportunity: Work as part of a varied contract team supporting a DoD client. Apply the expertise required to perform in-depth technical evaluations of computer and network technologies through the analysis and
Overview: The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research division of the Georgia Institute of Technology (Georgia Tech).Founded in 1934 as the Engineering Experiment Station, GTRI has grown to more than 2,900 employees,
Minimum qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience. 2 years of experience working in a hardware design technical environment, or 1 year of experience with an advanced degree.
Job Description Job Title: Principal Engineer - FPGA/ASIC Design Working Pattern: Full-time Working location: Indianapolis, IN or West Lafayette, IN (Hybrid Work Schedule) Rolls-Royce is looking for a Principal Engineer - FPGA/ASIC Design Specialist (Field Programmable Gate Arrays / Application
GPU Driver & Memory Management Architect Description - Job Summary • This role is responsible for exploring & developing GPU (and NPU-adjacent) driver architecture with deep ownership of memory management, enabling efficient shared memory utilization across
Minimum qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience. 3 years of experience in analog, digital, or mixed-signal design. 3 years of experience designing printed circuit boards (PCBs) containing
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture
Kaizen Approach is currently seeking a Hardware Design Engineer to design and test new integrated circuits and hardware components supporting a wide variety of signal processing applications and research efforts. In this role, you’ll design, document,
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. 4 years of experience in leading IP/SoC
Application close date:Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to