Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience in high-performance ASIC design. Experience architecting or designing RTL solutions for digital systems. Experience
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. Experience with
Job Details: Job Description: Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs. Participates actively
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Experience with scripting languages. Preferred qualifications: Masters degree or PhD in Electrical Engineering, Computer Engineering or Computer
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: Qualcomm is a company of inventors pushing the boundaries of high‑performance compute. Building on a legacy of industry‑leading innovation, we are extending our leadership
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 4 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. Design experience
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the digital architecture, design, Verilog RTL coding, implementation, and verification of next generation wireless and wired ASIC’s
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience in ASIC design. Experience with SystemVerilog/RTL coding. Experience with scripting languages (e.g., Tcl, Python or
THE COMPANY Silvus Technologies, a leading provider of advanced MANET and MIMO communications systems, is reshaping mesh network technology for mission-critical applications – on the ground, in the air and at sea. Its battle-proven StreamCaster family
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience in ASIC design, including one project focused on PCIe logic. Experience debugging RTL using
Minimum qualifications: Bachelors degree in Electrical Engineering or a related field, or equivalent practical experience. 8 years of experience with SystemVerilog, hardware design, automation, design verification test. 5 years of experience working with Computer-aided design (CAD).
Job Title: Microarchitect & RTL Design Engineer Location: Santa Clara, CA About the Role: We are seeking a seasoned Microarchitect and RTL Design Engineers with a strong background in microarchitecture and RTL coding. The ideal candidate will play a key
We are seeking a Sr. RTL Verification Engineer to join our clients team in Redwood City who is inspired to bring the power of generative AI to enhance and speed the design and manufacture of complex semiconductors.
A leading technology firm in Salt Lake City is seeking an experienced FPGA Electronic Warfare Design Engineer. The role involves leading FPGA design teams in coding and verification testing, as well as designing advanced electronic warfare systems.
Jobtailor in Aguadilla, PR seeks an experienced ASIC/FPGA engineer to lead RTL design, timing closure, and verification. You will work on RTL coding in VHDL/Verilog, develop testbenches, and drive architectural decisions with emphasis on design-for-test and manufacturability. Applicants should
A tech company in Cupertino is seeking an experienced ASIC/VLSI Design Engineer to design innovative communication systems. The role involves collaboration with multiple teams, RTL coding, and optimization of design for performance. Candidates should have over 5 years
About Us MicroVision is a global leader in innovative perception solutions, with offices in the U.S. and Germany. The company focuses on developing and supplying integrated lidar hardware and perception software to enhance safety and automation
SpaceX is seeking a Design Verification Engineer (Silicon Engineering) to verify digital ASICs at block and system levels, develop testbenches, and drive pre‑ and post‑silicon validation. You will implement UVM or non‑UVM test environments, automate tests
Digital Design Engineer focusing on high-performance analog‑to‑digital and digital‑to‑analog converters. Responsibilities include RTL design, verification, behavioral modelling, and support of synthesis, timing closure, and P&R flow for the digital controller of high‑performance data converters in cutting‑edge technologies.Qualifications
Teradynes Memory Test Division in Tualatin, OR is seeking an experienced FPGA Engineering Manager to lead a small team and deliver advanced memory test solutions, combining digital and analog design with PCIe, DDR, and SERDES interfaces.