Job Details: Job Description: About Altera At Altera, our independence as the world’s largest pure‑play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry‑leading
SummarySpecify, design and help in the verification and lab bring up of advanced mixed-signal circuits (digital side). DescriptionIn this job, you will be responsible for RTL coding of blocks specified by you or others for advanced mixed
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform
About TylSemi, Inc. The Opportunity The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience in high-performance ASIC design. Experience architecting or designing RTL solutions for digital systems. Experience
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. Experience with digital
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for CPU RTL development targeted for high performance, low power devices. Works with chip architects to conceive of
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Experience with scripting languages. Preferred qualifications: Masters degree or PhD in Electrical Engineering, Computer Engineering or Computer
FPGA/RTL Design Engineer to design, implement, and validate digital circuits and FPGA-based solutions. This role involves hands-on development using RTL languages, FPGA design tools, and simulation environments, while also supporting customers and creating technical assets that enable successful adoption
Our client is looking FPGA / RTL Design Engineer for Long term project in San Jose, CA (Onsite) Below is the detail requirement. Job Title: FPGA / RTL Design Enginee rLocation: San Jose, C A Job Descriptio n:FPGA/RTL Design
AMD Business Development Senior Manager At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration,
Program Manager (Chip Development) Were seeking an experienced and dynamic Program Manager to lead the end-to-end development lifecycle of complex integrated circuits (ICs). This role is all about defining, planning, executing, and finalizing chip development projects, making sure theyre
AWS Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s services
The application window is expected to close on: 10/01/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team: The Common Hardware Group
Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomm-Atheros, a.k.a. QCA http://www.qualcomm.com/qca/ is a wholly owned subsidiary of Qualcomm and a leading provider of wireless technologies for the mobile, networking, computing and
Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomm-Atheros, a.k.a. QCA http://www.qualcomm.com/qca/ is a wholly owned subsidiary of Qualcomm and a leading provider of wireless technologies for the mobile, networking, computing and
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience in post-layout physical netlist validation or low-power signoff in an ASIC design environment.
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.