K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit.Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners,
OpenAI is seeking a Software Engineer to build and scale design methodologies and software abstractions for silicon development. You will create reusable tools and workflows to accelerate chip design while improving quality and confidence in results.
Company Description Eximietas Design is a leading technology consulting and solutions development company specializing in Chip Design, Firmware & Embedded Software, Cloud Computing, Cyber Security, and AI/ML. With an experienced engineering leadership team responsible for over
# Senior ASIC Timing EngineerApplylocations: US, CA, Santa Clara: US, TX, Austin: US, OR, Hillsboro: US, NC, Durhamtime type: Full timeposted on: Posted Todayjob requisition id: JR2017336NVIDIA has been transforming computer graphics, PC gaming, and accelerated
Perform physical design of CPU on-chip interconnect networks and last-level caches Execute implementation, synthesis, timing closure, and timing analysis Collaborate with the logic design team on micro-architecture definition and feasibility Achieve timing, area, performance, and power
# Sr Mgr/Dep Director ASIC Digital Design IP ENGINEERINGApplylocations: Santa Claratime type: Full timeposted on: Posted Yesterdayjob requisition id: JR-2603672 About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development,
# Senior FPGA Engineer (TS/SCI)K2 Space Corporation • Los Angeles, California • Defense and Space Manufacturing • 7h agoSave this role or tell us whether you want more jobs like it.K2 is building the largest and
GlobalFoundries in Santa Clara is seeking a PMTS ASIC Digital Design Engineer to lead architecture implementation, microarchitecture development, and RTL design for high-performance processor cores and subsystem components. You will collaborate with architecture, verification, physical design, DFT,
# PMTS ASIC Digital Design IP ENGINEERINGApplylocations: Santa Claratime type: Full timeposted on: Posted Yesterdayjob requisition id: JR-2603673 About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication
About Sandia Sandia National Laboratories is the nations premier science and engineering lab for national security and technology innovation, with teams of specialists focused on cutting-edge work in a broad array of areas. Some of the
NVIDIA is seeking a Senior ASIC Timing Engineer to drive timing analysis and closure for GPUs, CPUs, LPUs, and SoCs across multiple levels. You will collaborate with RTL, DFX, and Clocks teams to define timing constraints and
K2 Space Corporation in the United States seeks a Senior ASIC Emulation Engineer to lead bring-up, deployment, and optimization of pre-silicon emulation platforms, collaborating with architecture, RTL, DV, firmware, and physical design teams. This hands-on role offers