Company Qualcomm Technologies, Inc. Job Area Engineering Group, Engineering Group GPU ASICS Engineering General Summary Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP, and performing pre-
Dexian is seeking a Memory I/O & Circuit Design Engineer in Boxborough, MA. The hybrid role focuses on designing high-speed I/O circuits and DDR IPs, performing simulations, and verifying design with Monte Carlo methods. A strong background
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI‑powered products. We deliver industry‑leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with
Silicon Design Engineer Location: San Jose, CA, Boxborough, Massachusetts, United States Duration: 12 Months Base pay range $45.00/hr - $49.00/hr Top Must Have Skills Circuit simulation and analysis System verilog behavioral modeling Scripting with tcl, python, and
A technology solutions provider is looking for a Silicon Design Engineer to work on circuit simulations and behavioral modeling. The role requires strong scripting skills in TCL, Python, and Shell as well as knowledge in circuit design
About Us: BW Design Group is a fully integrated architecture, engineering, construction, system integration, and consulting firm committed to helping our clients realize their most critical goals from Strategy to Commercialization. As the only firm born
WHAT YOU DRU AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip
Memory I/O & Circuit Design Engineer Boxborough, MA (Hybrid) 12+ Months $60-65/HR Role Design High-Speed IO circuits and DDR IPs. Duties Design/port standard cells Run spice simulations Perform Monte Carlo verification Experience 5-7 years in Schematic Design
Job Title: Memory I/O Design Engineer Location: Boxborough, MA (100% Onsite) Contract: 1 Year Client: AMD Base Pay Range $45.00/hr - $50.00/hr Job Description We are seeking a Memory I/O Design Engineer to join the High-Speed
Job Details Job Description: Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us.
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of