Static Timing Analysis Jobs In Laurel, California - 23 Job Positions Available

Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience in static timing analysis (STA), including 5 years of experience in a technical leadership capacity. Experience

Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with static timing analysis. Experience in Primetime or Tempus Tcl scripting and static timing analysis debug. Experience in full

About Etched Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With

SummaryAt Apple, we work every day to craft products that enrich peoples lives. If youre passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This

General Information Job Title Applications Engineering, Sr Staff Engineer - RTL2GDS Application Specialist Job ID 15341 City Sunnyvale State/Province California Date Posted 19-Feb-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No

General Information Job Title Principal (STA/ Sign-Off) Engineer-17042 (Austin/ Sunnyvale) Job ID 17042 City Sunnyvale State/Province California Date Posted 17-Apr-2026 Job Category Engineering Job Subcategory Engineering Hire Type Employee Remote Eligible No Base Salary Range: $191000

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As a Technical Account Executive, you will utilize your deep technical knowledge, sales skills, understanding of

SummaryDo you love creating elegant solutions to highly complex challenges? As part of our Hardware Technologies group, you’ll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and

Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience in ASIC design or RTL design. Experience with SoC design and integration. Experience

Job Details: Job Description: About Intel: At Intel, we strive to create innovative technologies that shape the future of computing and empower every person and organization on the planet. This position offers a unique opportunity to

• Conduct end-to-end design and development of advanced CMOS Image Sensor (CIS) technologies with a focus on transistor-level design, simulation, and verification of analog circuits using Cadence Virtuoso. • Design analog building blocks such as Analog

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: The DTECH team is part of the Global SOC organization and is responsible for STA methodology and signoff, foundry technology enablement and analysis, design automation

Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: Qualcomm Data Center team is developing High performance, Energy efficient server solution for data center applications. We are looking for highly talented, innovative, teamwork-oriented

Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomm-Atheros, a.k.a. QCA http://www.qualcomm.com/qca/ is a wholly owned subsidiary of Qualcomm and a leading provider of wireless technologies for the mobile, networking, computing and

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip

MULTIPLE POSITIONS AVAILABLE Employer: AMAZON.COM SERVICES LLC Offered Position: ASIC III Job Location: Sunnyvale, California Job Number: AMZ10291241 Position Responsibilities: Work on the Physical Design aspects of the system-on-chip (SoC) delivery. Work with RTL/logic designers to

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s mostinnovative companies unleash their potential. From autonomous cars to life-saving robots, our

Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience with SI/PI design for chip/package or system PCB. Experience in industry Signal integrity

At Johnson & Johnson,we believe health is everything. Our strength in healthcare innovation empowers us to build aworld where complex diseases are prevented, treated, and cured,where treatments are smarter and less invasive, andsolutions are personal.Through our