General Information Job Title R&D Engineering, Sr Staff Engineer- PrimeTime (Static Timing Analysis) Job ID 16703 City Sunnyvale State/Province California Date Posted 30-Mar-2026 Job Category Engineering Job Subcategory R&D Engineering Hire Type Employee Remote Eligible No Base
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Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. Must be a U.S.
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. Must be a U.S.
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group GPU ASICS Engineering General Summary: As a member of the Graphics team, the successful applicant will help develop new flows/methodologies and algorithms to improve power, performance and area
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group GPU ASICS Engineering General Summary: The Design Implementation Engineer will work in Qualcomms Adreno GPU team and will be responsible for managing all aspect of front end implementation
Job Details: Job Description: About the Role Join a team developing next-generation CPU cores that power client, server, IoT, and AI platforms. As a Senior Physical Design Engineer (CPU), you will play a key role in
Meta is building custom silicon to power the next generation of infrastructure and consumer hardware, including data center accelerators and wearable devices. The Physical Design team is responsible for translating RTL into manufacturable, high-performance silicon by
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience in physical design, including custom structured datapath implementation. Experience hardening dense compute units
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SummaryImagine what you could do here at Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and theres no telling what you
Job Details: Job Description: About Altera At Altera, our independence as the world’s largest pure‑play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry‑leading
General Information Job Title Applications Engineering, Sr Staff Engineer - RTL2GDS Application Specialist Job ID 15341 City Sunnyvale State/Province California Date Posted 19-Feb-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No
General Information Job Title PNR Applications Engineer, Staff Job ID 16004 City Sunnyvale State/Province California Date Posted 05-Mar-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Base Salary Range: $157000 -
General Information Job Title Applications Engineering, Sr Staff Engineer- RTL-to-GDS/Fusion Compiler Job ID 13802 City Sunnyvale State/Province California Date Posted 15-Dec-2025 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Base Salary
General Information Job Title Applications Engineering, Sr Staff Engineer-Physical Design, Synthesis Job ID 17527 City Austin State/Province Texas Date Posted 15-May-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Base Salary
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsofts over
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience in static timing analysis (STA), including 5 years of experience in a technical
Job Details: Job Description: About the Role Join a team developing next-generation CPU cores that power client, server, IoT, and AI platforms. As an Junior Senior Physical Design Engineer (CPU), you will contribute to cutting-edge silicon
The application window is expected to close on: 07/20/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This position requires that you live within