ASIC Verification Engineer This role has been designed as Hybrid with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing
The application window is expected to close on: 08/14/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group
The application window is expected to close on: 08/14/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This role requires being onsite in San
The application window is expected to close on: 08/14/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Job Description This role requires being onsite
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with design verification. Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs. Preferred
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, or a related technical field. 8 years of experience in design verification (DV) with a focus on digital signal processing (DSP), communication systems, or arithmetic logic blocks. Experience
The application window is expected to close on: 09/01/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team Join the Cisco Silicon
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with formal and design verification. Experience with SystemVerilog or Verilog. Experience working with one
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries,
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives communication and data processing transformation to help
The application window is expected to close on: 10/01/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group
SpaceX in Palo Alto is seeking a Sr. ASIC Design Verification Engineer to advance Starlink hardware and space systems. The role focuses on digital ASIC verification at block and system levels, test plan development, and pre/post‑silicon validation, with a hands‑on approach
Neuralink is seeking ASIC Design Verification Engineers to advance verification of SoC modules for its implant-focused brain-computer interface initiatives. The role emphasizes high-throughput, low-power DSP blocks and robust verification strategies with SystemVerilog and UVM. The team conducts architecture and logic implementation,
SpaceX designs and tests next-generation ASICs for SpaceX satellites and ground systems. The role focuses on digital ASIC verification at block and system levels, with responsibilities spanning test plan creation, testbench development, and regression execution to ensure robust post-silicon
SpaceX is seeking a Senior ASIC Design Verification Engineer to contribute to cutting‑edge digital ASIC verification for Starlink spacecraft and ground systems. You will verify at block and system levels, write verification plans, and develop test harnesses to ensure robust pre‑ and
United States Digital Space LLC is hiring a Design Verification Engineer (Silicon Engineering) to develop and verify next‑generation ASICs for space and ground infrastructures. You will join cross‑functional teams to design, test, and validate complex digital designs used in
United States Digital Space LLC in Palo Alto seeks a Sr. ASIC Design Verification Engineer (Silicon Engineering) to join our space-grade hardware team. You will develop next‑generation ASICs for Starlink deployments, working with cross‑functional teams to verify complex digital designs
ScaleFlux is seeking ASIC verification engineers for its team in Milpitas, California. The role involves collaboration with design teams, defining test plans, and developing verification environments. The ideal candidate is proficient in UVM methodology and has strong debugging skills. If
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