Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform
Application close date:Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to
Position:Design Verification Engineer (Einfochips) Job Description: Experience: 6+ Years Location: San Jose CA Job Description: What candidate will Be Doing: At-least 6+ years of experience in System Verilog HVL and C++/C At-least 6+ year of experience in UVM. Experience
Position SummarySamsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC)
Job Details: Job Description: Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation interconnect and chassis IPs that scale across multiple product families. You will work closely
SummaryAt Apple, we work to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly hardworking design verification engineer. As
SummaryThe Apple ecosystem harnesses multiple wireless technologies to deliver an unparalleled user experience. The Wireless Connectivity Silicon (WCS) team spearheads the development of complex System-on-Chip (SoCs) like the N1 family, enabling this experience in both current
SummaryThe Apple ecosystem harnesses multiple wireless technologies to deliver an unparalleled user experience. The Wireless Connectivity Silicon (WCS) team spearheads the development of complex System-on-Chip (SoCs) like the N1 family, enabling this experience in both current
The application window is expected to close on: 08/14/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group
The application window is expected to close on: 08/14/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Job Description This role requires being onsite
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with design verification. Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs. Preferred
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this
Senior Design Verification Engineer This role has been designed as Hybrid with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company
Senior Design Verification Engineer This role has been designed as Hybrid with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company
Position:Design Verification Engineer III Job Description: Annual Hiring Range/Hourly Rate: $95,900.00 - $126,280.00 Actual compensation offer to candidate may vary from posted hiring range based upon geographic location, work experience, education, and/or skill level. The pay ratio between base
Job Details: Job Description: The Role and Impact As an IP Design Verification Engineer, you will play a pivotal role in Intels mission to deliver world-class silicon solutions. In this role, you will ensure the functionality and reliability of
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, or a related technical field. 8 years of experience in design verification (DV) with a focus on digital signal processing (DSP), communication systems, or arithmetic logic blocks. Experience with