Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 4 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. Design experience
Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology Together Our technology solutions
Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology Together Our technology solutions
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. Experience with
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with digital design experience using SystemVerilog RTL. Experience with Computer Architecture. Preferred qualifications: Masters
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience with RTL Design. Experience with digital design, including synchronous and asynchronous logic, state machines,
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience in high-performance ASIC design. Experience architecting or designing RTL solutions for digital systems. Experience
Minimum qualifications: Bachelors degree in Electrical Engineering or a related field, or equivalent practical experience. 8 years of experience with SystemVerilog, hardware design, automation, design verification test. 5 years of experience working with Computer-aided design (CAD).
Job Title: Microarchitect & RTL Design Engineer Location: Santa Clara, CA About the Role: We are seeking a seasoned Microarchitect and RTL Design Engineers with a strong background in microarchitecture and RTL coding. The ideal candidate will play a key
JOB DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and AMD internal IPs. Successful candidates will be responsible for leading, and participating in, the
We are now looking for a Senior Logic Design Engineer! As part of the DGX FPGA Logic Team, you will take charge of a section of FPGA/CPLD development, focusing on micro-architectural definition, RTL coding, logic debug, synthesis, and
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform
NVIDIA is the AI computing company. Our Data Center Systems — including DGX, HGX, and MGX platforms — power AI training and inference for customers around the world. We are growing our teams with thoughtful, creative
Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology Together Our technology solutions
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience architecting RTL solutions employing software based construction, instantiation, customization or generation of RTL. Experience with industry-standard
General Information Job Title Staff R&D Engineer, Accelerated Verification Tools-16955 Job ID 16955 City Sunnyvale State/Province California Date Posted 10-Apr-2026 Job Category Engineering Job Subcategory R&D Engineering Hire Type Employee Remote Eligible No Base Salary Range:
Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional MTS Digital Design Engineering to join our Memory Interface Chip team in San Jose. In this
MTS Digital Design Engineer onsemi is seeking an MTS Digital Design Engineer - New Product Development - Power Management, to join our growing team in San Jose, California. This group is responsible for development of Power