At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Key Responsibilities Provide technical support to Cadence customers in the areas of Backend Digital Design Implementation
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience in silicon development or ASIC/SoC design. Experience with SystemVerilog Assertions (SVA) and formal
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side-by-side
Title - Lead ASIC DFT Engineer Location Remote (must be aligned with PST time zone) Below is the detailed job description for your reference - Job Description: Experience 10+ years of hands-on experience in ASIC Design-for-Test
Title - Lead ASIC DFT Engineer Location San Jose, CA - Open for Onsite/Remote (Should be in PST timings though) Visa- USC/GC Job Description Experience : 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role