At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Design Engineering Intern The Cadence Silicon Solutions Group (SSG) is seeing rapid adoption of our industry
Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and
Company Description Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful
We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradynes test technology ensures your device works right the first time, every time! Our portfolio of
About Lyte Lyte builds perception systems for Physical AI operating in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next-generation automation. Lyte is headquartered in
Do you like building software systems that power the worlds largest cloud network? Would you like to play a key role in developing the tools, automation, and data infrastructure that keep AWS network interconnects running at
Have you ever wondered what it would be like to build massively scalable systems that are used by the worlds largest cloud infrastructures? Would you enjoy broad yet equally deep scope that impacts all AWS systems
Have you ever wondered what it would be like to build massively scalable systems that are used by the worlds largest cloud infrastructures? Would you enjoy broad yet equally deep scope that impacts all AWS systems
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related technical field, or equivalent practical experience. 2 years of experience in ASIC RTL design using systemverilog or verilog. Experience with industry-standard EDA tools
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience in high-performance ASIC design. Experience architecting or designing RTL solutions for digital systems.
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development.
AIML enhanced Design/Verification Methodology Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this
IXL Learning, developer of personalized learning products used by millions of people globally, is expanding our software engineering team that manages the infrastructure for our Rosetta Stone and Wyzant products to ensure high quality of service.
Senior Design Verification Engineer This role has been designed as Hybrid with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the
Senior Design Verification Engineer This role has been designed as Hybrid with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the
The application window is expected to close on: 08/21/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This role requires the employee to work
Position:Design For Test Engineer III (IC) Job Description: What Youll Be Doing: DFT implementation for 3nm and 5nm Networking chips, IP DFT work RTL checks for scan-insertion compatibility using Synopsys Spyglass Scan-Insertion using Tessent TestKompress ATPG
Company Description At Intuitive, we are united behind our mission: we believe that minimally invasive care is life-enhancing care. Through ingenuity and intelligent technology, we expand the potential of physicians to heal without constraints. As a
Centrillion Technologies develops advanced DNA Chips which have a wide range of applications, including whole genome sequencing, spatial biology, digital pathology, next generation genotyping, synthetic biology and DNA computing. Our world’s most advanced high resolution and