A leading technology company in Cupertino, CA, is seeking a Physical Design Engineer responsible for implementing design partitions for complex Systems-on-Chip. The ideal candidate will have a Masters degree in Electrical Engineering and at least 2
Job Details: Job Description: About Altera At Altera, our independence as the world’s largest pure‑play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry‑leading
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience with physical design and leading full-chip or massively intricate subchip implementation (e.g., from
SummaryDo you love creating elegant solutions to highly complex challenges? As part of our Hardware Technologies group, you’ll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and
General Information Job Title UCIe Applications Engineering Architect Job ID 16991 City Sunnyvale State/Province California Date Posted 14-Apr-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Base Salary Range: $184000 -
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip
Company:Qualcomm Atheros, Inc. Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomm-Atheros, a.k.a. QCA http://www.qualcomm.com/qca/ is a wholly owned subsidiary of Qualcomm and a leading provider of wireless technologies for the mobile, networking, computing and
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: Qualcomm Data Center team is developing High performance, Energy efficient server solution for data center applications. We are looking for highly talented, innovative, teamwork-oriented
HCLTech is looking for a highly talented and self- motivated Silicon Interposer Design Engineer to join it in advancing the technological world through innovation and creativity. Job Title: Silicon Interposer Design Engineer Job REQ ID: 133407
Position: Sr. SRAM Layout Design Engineer Location: Santa Clara, CA (Onsite) Hire Type: Full Time Experience: 10+ Years What you will be doing: · Manage the complete custom layout process for SRAM bitcell arrays, memory periphery,
Array Labs builds advanced radar systems to help humanity understand and respond to changes across the physical world. We’re launching a coordinated fleet of radar satellites to create a high-resolution 3D map of the Earth –
# ASIC/VLSI Design EngineerAustin, Texas · Full-time# About The PositionWe are looking for talented and experienced VLSI Design Engineers/Micro-architects.As an VLSI Digital Design Engineer/Micro-architect, youll have the opportunity to design highly sophisticated, innovative new cutting edge
Summary We’re a well‑funded, stealth startup building a next‑generation, end‑to‑end computing platform powered by a custom, high‑performance edge SoC on an advanced process node. By integrating flagship compute IP into an industry‑leading design, we are building
Summary We’re a well‑funded, stealth startup building a next‑generation, end‑to‑end computing platform powered by a custom, high‑performance edge SoC on an advanced process node. By integrating flagship compute IP into an industry‑leading design, we are building
Description Socionext Inc. (SNI) is an innovative enterprise that designs, develops, and delivers System-on-Chip products to customers worldwide. The company is focused on AR/VR, imaging, networking, storage and other dynamic technologies that drive today’s leading-edge applications.
Job Summary We are seeking an experienced Analog/Mixed‑Signal IC Design Engineer to design and deliver high‑performance integrated circuits from concept through silicon validation and production. This role spans architecture, circuit design, and lab bring‑up, with significant
About Normal Computing Normal Computing builds silicon that turns thermal noise from an obstacle into a computational resource. Conventional chips spend most of their energy forcing determinism onto physics; ours compute with it. Stochastic, in-memory, asynchronous:
Member of Technical Staff, Hardware, RTL Design Engineer At River, our mission is to create personal AI owned and shaped by each individual. To achieve this, we are rewriting the entire stack from scratch: personal hardware
About Advanced Energy Advanced Energy (Nasdaq: AEIS) is a global leader in the design and manufacturing of highly engineered, precision power conversion, measurement and control solutions for mission-critical applications and processes. AE’s power solutions enable customer
Amazon seeks an experienced Sr. Physical Design Engineer for Annapurna Labs to drive RTL-to-GDSII flows in advanced nodes. You will collaborate with RTL and architecture teams to optimize power, performance and area while delivering robust sign-off