Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with static timing analysis. Experience in Primetime or Tempus Tcl scripting and static timing analysis
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have
About Etched Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With
Company:Qualcomm Technologies, Inc. Job Area:Engineering Group, Engineering Group CPU Engineering General Summary: NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have
Neetha Consulting LLC is seeking a Senior Physical Design Engineer to support multiple openings in the silicon flow, from floorplanning to signoff. You will collaborate with logic design, synthesis, and verification teams to ensure accurate physical
Maxonic Inc. is seeking a Physical Design Manager to lead a hands-on, execution-first PD team in Westborough, MA. This role blends technical contribution with first-line people leadership to drive timing closure and convergence on complex SoCs. The ideal
Company Description Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful
Job Details: Job Description: About Altera At Altera, our independence as the world’s largest pure‑play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry‑leading
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development. Experience
AIML enhanced Design/Verification Methodology Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing
At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You
Senior Design Verification Engineer This role has been designed as Hybrid with a requirement that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the
The application window is expected to close on: 09/30/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This position requires that you live within
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience with physical design and leading full-chip or massively intricate subchip implementation (e.g., from
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This position is for an R&D engineer, who will be involved in developing a multi-threaded and
SummaryDo you love creating elegant solutions to highly complex challenges? As part of our Hardware Technologies group, you’ll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Experience with scripting languages. Preferred qualifications: Masters degree or PhD in Electrical Engineering, Computer Engineering or Computer
We Are open for this role to be located in Austin, Boxborough, Oregon, and California Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, or a related technical field. 10 years of experience in design for Digital Signal Processing (DSP) or high-speed digital logic. Experience in Verilog/SystemVerilog or VHDL. Experience with
General Information Job Title Silicon IP Program Manager - 18275 Job ID 18275 City Sunnyvale State/Province California Date Posted 22-Jul-2026 Job Category General Management Job Subcategory Program Management (Technical) Hire Type Employee Remote Eligible No Base